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Tela Innovations offers innovative, lithography optimized design solutions that lower power, reduce die area and improve performance of integrated circuits in advanced technologies. With the acquisition of Blaze, Tela adds an additional capability to its line up aimed specifically at reducing leakage power. This technology will compliment Tela’s solution of on-grid, straight line, one dimensional layout structures. These lithography-optimized structures enable manufacturing process optimization resulting in significant improvements in performance, power and area.

 

NEW FROM TELA INNOVATIONS

TSMC New Standard Cell Slim Library Reduces Logic Area 15%
First Library Introduced Under AreaTrim Collaboration with Tela Innovations



Conventional Library - Routed Block
(diffusion, poly, contact layers shown)

Slim Library - Routed Block
(diffusion, poly, contact layers shown)


TSMC Offers Off-the-Shelf PowerTrim Standard Cell Libraries
Use of PowerTrim Libraries Similar to Multi-Vt Libraries



47th DAC: Design Automation Conference
June 13 – 18, 2010
Anaheim Convention Center
Anaheim, CA
TSMC Booth # 294

TSMC New Standard Cell Slim Library Reduces Logic Area 15%
June 15, 2010

TSMC HELPS LSI REDUCE LEAKAGE 25 PERCENT ON NEXT GENERATION PRODUCT
January 6, 2010

TELA INNOVATIONS SHOWCASES DESIGN AND PROCESS CO-OPTIMIZATION SOLUTIONS AT 2009 DAC
July 13, 2009

 

NEW TECHNICAL PAPERS

 

Tela Innovations, Inc.
products and technology are covered by patents, patent applications or other intellectual property rights including but not limited to United States patent numbers: 7343581, 7446352, 7100134, 7149999, 7404173, 7337424, 7441211.