USITC INSTITUTES SECTION 337 INVESTIGATION BASED ON TELA INNOVATIONS COMPLAINT
- At March 12, 2013
- In Press Releases
TELA INNOVATIONS, INC. FILES COMPLAINT AT THE U.S. INTERNATIONAL TRADE COMMISSION FOR UNFAIR TRADE PRACTICES STEMMING FROM PATENT INFRINGEMENT
LOS GATOS, Calif. – February 11, 2013 – Tela Innovations, Inc. today announced that it filed a complaint with the U.S. International Trade Commission (USITC) against HTC Corporation, HTC America, Inc., LG Electronics, Inc., LG Electronics U.S.A., Inc., LG Electronics MobileComm U.S.A., Inc., Motorola Mobility LLC, Nokia Corporation; Nokia, Inc.; Pantech Co., Ltd.; and Pantech Wireless, Inc. (collectively, the “Respondents”) alleging that the Respondents have engaged in unfair trade practices by selling for importation into the United States, importing into the United States, and/or selling after importation into the United States certain consumer electronics devices that infringe seven of Tela’s United States patents.
Tela has created patented design solutions for advanced IC manufacturing processes where lithography-driven constraints require novel approaches to both digital circuit design and the physical implementation of these designs. These solutions are utilized in the most recent generation of products offered by the named Respondents.
TELA RANKS AMONG INDUSTRY HEAVYWEIGHTS IN IEEE SPECTRUM REPORT ON ‘PATENT POWER’
Unique solutions that help IC manufacturing scale place Tela in Top 20 of prestigious list of important and quality innovation portfolios
LOS GATOS, Calif. – January 9, 2012 – Tela Innovations, which provides design solutions to enable continued cost-effective scaling of semiconductor manufacturing, has been ranked by IEEE Spectrum magazine as being among the leaders of the semiconductor and electronics industry for the quality and potential impact of its patents. In the 2012 edition of its prestigious Patent Power list, the publication ranks Tela 11th in the Semiconductor Manufacturing category, placing the company alongside major suppliers such as Samsung (#1), SanDisk (#2), Broadcom (#4), Intel (#12) and Rambus (#13).
Read More»TELA INTRODUCES NEW LITHOGRAPHY-OPTIMIZED STANDARD CELL LIBRARIES FOR 32/28NM AND 22/20NM PROCESSES
- At June 4, 2012
- In Press Releases
Physical IP blocks offer significant improvements in performance, power, and area by leveraging Tela’s approach to overcoming lithography-driven constraints
LOS GATOS, Calif. –JUNE 4, 2012 – Tela Innovations, which provides design solutions to enable continued cost-effective scaling of semiconductor manufacturing, today announced the availability of new standard cell libraries optimized for manufacturing processes of 32/28nm and 22/20nm. The foundry-independent libraries leverage Tela’s unique proactive approach to the design challenges posed by lithography constraints at 28nm and below.
Read More»TELA OFFERS FREE LEAKAGE ESTIMATE ON NEW WEB SITE
- At June 4, 2012
- In Press Releases
Quick turnaround analysis of logic designs using power optimization technologies that have demonstrated up to 78% leakage power reduction
LOS GATOS, Calif. – June 4, 2012 – Tela Innovations, which provides design solutions to enable continued cost-effective scaling of semiconductor manufacturing, today announced the availability of a free, customized leakage analysis service for the logic portion of advanced System on Chip (SoC), ASIC designs. Reducing power to extend battery life and reduce heat dissipation is key to adding value in the highly competitive semiconductor market. The company uses a combination of its Tela Optimizer power reduction tool and its unique gate length biasing techniques to achieve up to 78% reduction in leakage on designs that have already been optimized using industry standard EDA tools and in-house optimization scripts.
Read More»TELA NAMES INTELLECTUAL PROPERTY LAWYER AS GENERAL COUNSEL
- At June 4, 2012
- In Press Releases
Liz Stewart joins executive team as company evolves its IP and licensing strategies
Liz Stewart
TSMC NEW STANDARD CELL SLIM LIBRARY REDUCES LOGIC AREA 15%
- At June 15, 2010
- In Press Releases
First Library Introduced Under AreaTrim Collaboration with Tela Innovations
Issued by: TSMC
Issued on: 2010/06/15
Hsinchu, Taiwan, R.O.C. – June 15, 2010 – Taiwan Semiconductor Manufacturing Company, Ltd. (TWSE: 2330, NYSE: TSM) today introduced the first Slim Library that reduces system-on-chip (SoC) routed logic block area by 15 percent compared to blocks routed through current standard cell libraries.
Read More»Mellanox and TSMC Collaborate to Enable Next-Generation Green Data Centers
- At March 23, 2010
- In Press Releases
ConnectX(R)-2 InfiniBand and Ethernet Adapters, Utilizing TSMC’s PowerTrim Service, Deliver Optimized Power Efficiency to Substantially Reduce Data Center Power and Cooling Costs
SUNNYVALE, Calif. & YOKNEAM, Israel, Mar 23, 2010 (BUSINESS WIRE) — Mellanox(R) Technologies, Ltd. (NASDAQ:MLNX) (TASE:MLNX), a leading supplier of high-performance, end-to-end connectivity solutions for data center servers and storage systems, today announced that its ConnectX-2 family of adapters, recently released for general availability, leverages TSMC’s PowerTrim service to achieve best in class power performance of 4.5W for dual 10GbE ports. The technology is part of Mellanox’s energy-efficient data center initiative and delivers a 20 percent overall power leakage reduction in Mellanox’s current generation of adapter products. PowerTrim is a patented power optimization technology platform based on TSMC’s advanced manufacturing processes to reduce leakage in devices manufactured on TSMC 90nm and smaller process geometries.
Read More»TSMC HELPS LSI REDUCE LEAKAGE 25 PERCENT ON NEXT GENERATION PRODUCT
PowerTrim gate length biasing optimizes power with no area or performance compromise
Hsinchu, Taiwan – January 6, 2010 – Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) (TWSE: 2330, NYSE: TSM) today announced that LSI Corporation achieved over 25% overall leakage reduction in a next-generation product by implementing TSMC’s PowerTrim power optimization technology on the company’s 65nm low power (LP) process.
Read More»TELA INNOVATIONS SHOWCASES DESIGN AND PROCESS CO-OPTIMIZATION SOLUTIONS AT 2009 DAC
- At July 13, 2009
- In Press Releases
Expanded offering addresses power and area reduction through tight connection to TSMC manufacturing process
SAN JOSE, Calif. – July 13, 2009 – Tela Innovations, which provides design solutions to enable continued cost-effective scaling of semiconductor manufacturing, will be demonstrating advancements in both its straight-line, one dimensional layout optimization technology and its CD biasing technology for reducing power at the 46th annual Design Automation Conference (DAC) July 26-30 in San Francisco. Both technologies work in conjunction with underlying manufacturing process technologies to optimize for critical area and power requirements. The company, which acquired the power optimization solution from Blaze Technology earlier this year, will demonstrate the results of its continued collaboration with TSMC in tightly coupling it design technology with the foundry’s advanced manufacturing processes.
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