Low Capital Cost Extension of Domestic Manufacturing
The trusted foundries that produce the microchips used in our National Defense and Intelligence Systems are facing a serious challenge. In order to meet the performance and power requirements of current and future programs, the manufacturers need to provide a guaranteed source of advanced generation semiconductors. Each new semiconductor generation has increasingly large capital expense and development costs. Commercial semiconductor manufacturing facilities are designed for high-volume where the increasing expense can be spread over millions of identical microchips. However, the DoD typically needs small quantities of a wide mix of special devices.

Extending Single Pass Lithography Using Tela 1D Layout
Lithography tools are a main driver to the increase in capital equipment costs. Tela’s 1D layout enables DoD foundries to extend their existing lithography equipment by 1 to 2 nodes. The figure below demonstrates the ability to print 90nm patterns using 150nm lithography tools by printing patterns based on the Tela 1D design style.

Extending Manufacturing Using Double Patterning and Tela 1D Layout
Existing lithography tools can be further extended by applying multiple masks to critical layers, also referred to as Double Patterning. Each application of Double Patterning provides a two process node extension to existing lithography tools. The viability of the two common approaches for Double Patterning, Litho-Etch-Litho-Etch (LELE) and Spacer Double Patterning (SDP) is significantly enhanced through the use of Tela 1D layout.

The figure below demonstrates the use of 1D patterns to enable Spacer Double Patterning which is used to create 45nm 1D patterns using a 90nm lithography tool.

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