PHYSICAL IP


Libraries

Tela has an extensive set of standard cell libraries, optimized for the most advanced technology nodes, available to license to customers. The circuit design and layouts of each cell in these libraries have been optimized for the node specific constraints imposed by the underlying lithography limitations. From unidirectional, fixed pitch gates at 28nm, or double patterning considerations for Mx layers at 20nm, to transistor quantization of FinFET based cells, Tela has an optimized library solution ready for customers.

Based on a growing portfolio of over 70 patents, Tela’s solutions offer a differentiated approach to the design challenges posed by lithography constraints at 28nm and below. Developed over the past 5 years by a seasoned team of experts in delivering production ready, physical IP, the Tela libraries offer superior power, performance and area (PPA) vs. conventional libraries.

Tela’s inventory of libraries covers a broad range of design points from high density, low power applications to high performance, speed critical applications. The libraries contain a full compliment of cells including specialty cells for power management and ECO capabilities.

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